Comparison of on-wafer calibrations for THz InP-based PHEMTs applications

A quantitative comparison of multiline TRL (thru-reflect-line) and LRM (line-reflect-match) on-wafer calibrations for scattering parameters (S-parameters) measurement of InP-based PHEMTs is presented. The comparison is undertaken for the first time and covers a frequency range from 70 kHz to 110 GHz. It is demonstrated that the accuracy of multiline TRL and LRM calibration is in good agreement. Both methods outperform the conventional SOLT calibration in the full frequency band up to 110 GHz. Then the excellent RF performance is obtained by extrapolation on the basis of inflection point, including a maximum current gain cut-off frequency ft of 247 GHz and a maximum oscillation frequency fmax of 392 GHz. The small-signal model based on LRM calibration is established as well. The S-parameters of the model are consistent with the measured from 1 to 110 GHz.

Source:IOPscience

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InP-Si BiCMOS Heterointegration Using a Substrate Transfer Process

Broadband transmitters for radio links in the mm-wave range are key building blocks for future wireless communication systems. In this work such components are to be realized by means of an InP-on-BiCMOS technology. This allows the combination of the favorable power performance of III-V transistors with the advantages of BiCMOS circuits such as complexity and integration density.This helps to avoid critical performance trade-offs compared to the pure III-V or BiCMOS versions. The heterointegration technology allows the integration of sub-mm-wave front-ends together with control logics and other lower-frequency components on a single chip. This drastically reduces packaging efforts. The strategy is to rely on BiCMOS as far as possible and to apply III-V elements only for functions for which they show clear superiority. In a first run the passive elements and the dc- and rf-interconnects between InP and BiCMOS were tested. This test showed the feasibility of the wafer bond process for the heterointegration of InP and BiCMOS. For that purpose a five metal layer Al back-end with silicon dioxide as interlayer dielectric was built on the silicon wafer. A three layer metallization (Au) in benzocyclobutene (BCB) as insulating dielectric represented the environment for the InP-HBTs. Thin film micro strip lines and special designed interconnects between the two metallization systems were characterized in dependence of frequencies up to 100 GHz to estimate the insertion losses.

Source:IOPscience

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Quantitative Analysis of the Metallic Contamination On GaAs and InP Wafers by TXRF and ICPMS Techniques

The quantitative analysis of the metallic contaminants both by chemical collection coupled to ICPMS and TXRF were implemented on GaAs and InP 100mm wafers. VPD-DC-ICPMS and LPD-ICPMS were developed respectively for GaAs and InP substrates. These methods present CE higher than 85% for usual metallic contaminants except for Cu & noble metals, and very sensitive detection thresholds are reached (108 to 1011 at/cm²). TXRF analysis conditions were optimized on both substrates. Na, Mg, Al, Ir and Ge on GaAs and K, Ca, Pd and Ag on InP are not analyzable due to substrate interferences. TXRF calibration was carried out from intentionally contaminated wafers in reference to ICPMS methods. Finally, TXRF enables to reach interesting detection limits (1010 to 1012at/cm² range) and is able to measure Cu and some noble metals.

Source:IOPscience

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Kinetic study of hydrogen lateral diffusion at high temperature in a directly-bonded InP-SiO2/Si substrate

Hybrid integration of III–V materials onto silicon by direct bonding technique is a mature and promising approaches to develop advanced photonic integrated devices into the silicon photonics platform. In this approach, the III–V material stack is grown on an InP wafer in a unique epitaxial step prior to the direct bonding process onto the silicon-on-insulator wafer. Currently, no additional epitaxial regrowth steps are implemented after bonding. This can be seen as a huge limitation as compared to the III–V on III–V wafer mature technology where multi-regrowth steps are most often implemented. In this work, we have studied the material behavior of an InP membrane on silicon (InPoSi) under epitaxial regrowth conditions by metal-organic vapor phase epitaxy (MOVPE). MOVPE requires high-temperature elevation, typically above 600 °C. We show for the first time the appearance of voids at 400 °C in an InP seed (100 nm) directly-bonded onto a thermally oxidized Si substrate despite the use of a thick SiO2 oxide (200 nm) at the bonding interface. This phenomenon is explained by a weakening of the bonding interface while high-pressurized hydrogen is present. A kinetic study of the hydrogen lateral diffusion is carried out, enabling the assessment of its lateral diffusion length. To overcome the void formation, highly efficient outgassing trenches after bonding are demonstrated. Finally, high-quality AlGaInAs-based multi-quantum well (MQW) heterostructure surrounded by two InP layers was grown by MOVPE on InPoSi template patterned with outgassing trenches. This process is not only compatible with MOVPE regrowth conditions (650 °C under PH3) but also with conventional fabrication processes used for photonic devices.

Source:IOPscience

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Photoluminescence of Semi‐insulating InP Wafers Prepared by Two‐Step Wafer Annealing

InP wafers with very low residual Fe concentrations were subjected to a two‐step wafer annealing procedure and were then measured by photoluminescence. A sharp line at 1.3618 eV was clearly observed after the first step high temperature annealing, and was largely reduced after the second step medium temperature annealing. This sharp line seems to be due to vacancy‐related defects. The reduction may cause the improvement of the electrical property uniformity.

Source:IOPscience

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