Uniformity of Iron-Doped Semi-Insulating InP Wafers

Abstract

50 ∼ 100 mm diameter iron-doped InP crystal was grown by in-situ phosphorous injection synthesis liquid encapsulated Czochraski (LEC) method. Samples were characterized by high speed photoluminescence (PI) mapping and Etch pit density (EPD) mapping method. The perfection of these samples were studied and compared. 100 mm diameter InP single crystals were successfully developed by rapid P-injection in-situ synthesis LEC method. The EPD across the ingot was less than 5 × 104 cm−2, which was almost equal to the crystals of diameter 50 and 76 mm. By adjusting the thermal field and ensuring the chemical stoichiometry, InP crystals of larger diameters and good performance could be developed.

Key words

InP;

semi-insulating;

uniformity

Source:ScienceDirect

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UCSA Researchers Constructs Quantum Cascade Laser on Silicon

A team of researchers from across the country, led by Alexander Spott, University of California,Santa Barbara,UAS, have built the first quantum cascade laser on silicon. The advance may have applications that span from chemical bond spectroscopy and gas sensing, to astronomy and free-space communications.

Integrating lasers directly on silicon chips is challenging, but it is much more efficient and compact than coupling external laser light to the chips. The indirect bandgap of silicon makes it difficult to build a laser out of silicon, but diode lasers can be built with III-V materials such as InP or GaAs. By directly bonding an III-V layer on top of the silicon wafer and then using the III-V layers to generate gain for the laser, this same group has integrated a multiple quantum well laser on silicon that operates at 2 µm. Limitations in diode lasers prevent going to longer wavelengths where there are many more applications, so the group turned their attention to using quantum cascade lasers instead.

Building a quantum cascade laser on silicon was a challenging task made more difficult by the fact that silicon dioxide becomes heavily absorptive at longer wavelengths in the mid-infrared. “This meant that not only did we have to build a different type of laser on silicon, we had to build a different silicon waveguide too,” Spott explained. “We built a type of waveguide called a SONOI waveguide [silicon-on-nitride-on-insulator], which uses a layer of silicon nitride [SiN] underneath the silicon waveguide, rather than just SiO₂.”

The breakthrough could lead to several applications, Spott explained. “Traditionally, silicon photonic devices operate at near-infrared wavelengths, with applications in data transmission and telecommunications. However, there is emerging research interest in building these silicon photonic devices for longer mid-infrared wavelengths, for a range of sensing and detection applications, such as chemical bond spectroscopy, gas sensing, astronomy, oceanographic sensing, thermal imaging, explosive detection, and free-space communications.

The next step for the team is to improve the heat dissipation to improve the performance of these QCLs and to allow them to make continuous-wave QCLs on silicon. “We generally hope to improve the design to get higher powers and efficiency,” Spott said. “This brings us closer to building fully integrated mid-infrared devices on a silicon chip, such as spectrometers or gas sensors. Silicon is inexpensive, the fabrication can be scaled up to significantly reduce the cost of individual chips, and many small devices can be built on the same silicon chip – for example multiple different types of sensors operating at different mid-infrared wavelengths.”

This work is done in collaboration with the U.S.Naval Research Laboratory and the University of Wisconsin,Madison.

Source:LEDinside

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Team builds first quantum cascade laser on silicon

3-D artistic depiction of multiple Quantum Cascade Lasers integrated above silicon waveguides. Credit: Alexander Spott

A team of researchers from across the country, led by Alexander Spott, University of California, Santa Barbara, USA, have built the first quantum cascade laser on silicon. The advance may have applications that span from chemical bond spectroscopy and gas sensing, to astronomy and free-space communications.

Integrating lasers directly on silicon chips is challenging, but it is much more efficient and compact than coupling external laser light to the chips. The indirect bandgap of silicon makes it difficult to build a laser out of silicon, but diode lasers can be built with III-V materials such as InP or GaAs. By directly bonding an III-V layer on top of the silicon wafer and then using the III-V layers to generate gain for the laser, this same group has integrated a multiple quantum well laser on silicon that operates at 2 µm. Limitations in diode lasers prevent going to longer wavelengths where there are many more applications, so the group turned their attention to using quantum cascade lasers instead.

Building a quantum cascade laser on silicon was a challenging task made more difficult by the fact that silicon dioxide becomes heavily absorptive at longer wavelengths in the mid-infrared.

"This meant that not only did we have to build a different type of laser on silicon, we had to build a different silicon waveguide too," Spott explained. "We built a type of waveguide called a SONOI waveguide [silicon-on-nitride-on-insulator], which uses a layer of silicon nitride [SiN] underneath the silicon waveguide, rather than just SiO2."

The breakthrough could lead to several applications, Spott explained. Traditionally, silicon photonic devices operate at near-infrared wavelengths, with applications in data transmission and telecommunications. However, there is emerging research interest in building these silicon photonic devices for longer mid-infrared wavelengths, for a range of sensing and detection applications, such as chemical bond spectroscopy, gas sensing, astronomy, oceanographic sensing, thermal imaging, explosive detection, and free-space communications.

The next step for the team is to improve the heat dissipation to improve the performance of these QCLs and to allow them to make continuous-wave QCLs on silicon. "We generally hope to improve the design to get higher powers and efficiency," Spott said. "This brings us closer to building fully integrated mid-infrared devices on a silicon chip, such as spectrometers or gas sensors. Silicon is inexpensive, the fabrication can be scaled up to significantly reduce the cost of individual chips, and many small devices can be built on the same silicon chip for example multiple different types of sensors operating at different mid-infrared wavelengths."

Source:phys

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A team of researchers from across the country, led by Alexander Spott, University of California, Santa Barbara, USA, have built the first quantum cascade laser on silicon. The advance may have applications that span from chemical bond spectroscopy and gas sensing, to astronomy and free-space communications.

Integrating lasers directly on silicon chips is challenging, but it is much more efficient and compact than coupling external laser light to the chips. The indirect bandgap of silicon makes it difficult to build a laser out of silicon, but diode lasers can be built with III-V materials such as InP or GaAs. By directly bonding an III-V layer on top of the silicon wafer and then using the III-V layers to generate gain for the laser, this same group has integrated a multiple quantum well laser on silicon that operates at 2 µm. Limitations in diode lasers prevent going to longer wavelengths where there are many more applications, so the group turned their attention to using quantum cascade lasers instead.

Building a quantum cascade laser on silicon was a challenging task made more difficult by the fact that silicon dioxide becomes heavily absorptive at longer wavelengths in the mid-infrared. “This meant that not only did we have to build a different type of laser on silicon, we had to build a different silicon waveguide too,” Spott explained. “We built a type of waveguide called a SONOI waveguide [silicon-on-nitride-on-insulator], which uses a layer of silicon nitride [SiN] underneath the silicon waveguide, rather than just SiO₂.”

The breakthrough could lead to several applications, Spott explained. “Traditionally, silicon photonic devices operate at near-infrared wavelengths, with applications in data transmission and telecommunications. However, there is emerging research interest in building these silicon photonic devices for longer mid-infrared wavelengths, for a range of sensing and detection applications, such as chemical bond spectroscopy, gas sensing, astronomy, oceanographic sensing, thermal imaging, explosive detection, and free-space communications.

The next step for the team is to improve the heat dissipation to improve the performance of these QCLs and to allow them to make continuous-wave QCLs on silicon. “We generally hope to improve the design to get higher powers and efficiency,” Spott said. “This brings us closer to building fully integrated mid-infrared devices on a silicon chip, such as spectrometers or gas sensors. Silicon is inexpensive, the fabrication can be scaled up to significantly reduce the cost of individual chips, and many small devices can be built on the same silicon chip – for example multiple different types of sensors operating at different mid-infrared wavelengths.”

This work is done in collaboration with the U.S. Naval Research Laboratory and the University of Wisconsin, Madison.

Keywords:Related Applications,Laser,Silicon,UCSA research,

Source:ScienceDirect

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A vertical coupler for InP active components

Highlights

•

A discussion about a coupler of an active component on a SOI wafer is presented.

•

A model is developed using a coupling length based a model solver.

•

The measured results confirm our model for the design of an active components.

Abstract

A discussion about a coupler of a InP active component on a silicon-on-insulator (SOI) wafer is presented for applications in optical interconnects. A model for the design and evaluation of the coupler is developed using a coupling length based a model solver, the model solver is specifically suited for high index contrast waveguides with small area, which show more accurate for compact integrated optical devices. The photonic coupler is fabricated using microelectronics equipment for compatibility towards future generation electronic integrated circuit processing. Measured coupler efficiency is 65% to valid our model. This will be helpful for the design of InP active components.

Keywords

InP active component

A vertical coupler

Coupler efficiency

Source:ScienceDirect

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Heat treatments of InP wafers

Abstract

Effects of heat treatment on InP crystals have been studied. It was found that the carrier concentration of undoped InP can be decreased after annealing. The reduction of the carrier concentration depends on the carrier concentration of as-grown wafers. When lightly Zn doped (Zn concentration is 4.0 × 1015 cm-3) InP wafers were annealed, high resistivity (more than 105 Ω cm) InP could be obtained. The activation energy measured by temperature dependent Hall effect was 0.44 eV. The reason why the carrier concentration decreases seems to be concerned with the increase of the density of the 0.44 eV deep level defects. By applying these effects, low Fe doped semi-insulating InP wafers could also be obtained by annealing slightly Zn co-doped wafers.

Source:ScienceDirect

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Investigation of striations in doped InP wafers by scanned photoluminescence and spatially resolved SIMS

Abstract

Scanned photoluminescence (SPL) is used in the laboratories for the assessment of the homogeneity of InP wafers grown as substrate material for monolithic optoelectronic integrated circuits. A typical feature in SPL images of doped InP wafers are growth striations occurring as circular patterns. To clarify the origin of these striation patterns the authors have compared PL intensity line profiles extracted from SPL images with line profiles of dopant concentrations measured with secondary ion mass spectroscopy (SIMS). Their measurements on two n-type InP wafers, one doped with Fe and the other doped with Fe, Ga and Sb revealed that the spatial modulation of the PL intensity visible as a striation pattern coincides with the striation-related fluctuations of the dopant concentrations. In both samples the modulation of the PL intensity is anti-correlated with the Fe striations. They conclude that the recombination behaviour is mainly influenced by fluctuations of the deep acceptor Fe.

Source:IOPscience

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Low temperature heterogeneous integration without glue

Figure 1. Optical microscope and SEM images of GaInAsP/SOI hybrid wafers.

Realization of large scale photonic integration for one-chip optical routers is crucial for future optical networks and interconnection for big data transmission and artificial intelligence technology. To meet these technical needs, platforms based on silicon photonic integrated circuits are expected to play an important role because of the availability of large diameter wafers and CMOS fabrication technology.

However, it is difficult to realize light sources using silicon because it is an indirect bandgap semiconductor.

Now, Nobuhiko Nishiyama and colleagues at Tokyo Institute of Technology have demonstrated the operation of 1.55-μm GaInAsP lasers on silicon using low temperature plasma activated bonding (PAB).

The hybrid wafers, which consist of an InP-based wafer and a SOI wafer, were fabricated by PAB. The two wafers were irradiated with plasma in a vacuum chamber to active the surface. Then, the two wafers were bonded at 150 oC, which is much lower than that of conventional bonding methods. Even at such low temperature bonding, the wafers had sufficient bonding strength.

The hybrid lasers showed lasing operation at room temperature. The threshold current was 64 mA, which corresponds to a threshold current density of 850 A/cm2.

These hybrid lasers fabricated by low temperature bonding are expected to be a key technology to establish large scale photonic platforms.

Explore further: DARPA program "grows" lasers directly on silicon-based microchips

More information: Yusuke Hayashi et al. Low Threshold Current Density Operation of a GaInAsP/Si Hybrid Laser Prepared by Low-Temperature NPlasma Activated Bonding, Japanese Journal of Applied Physics (2013). DOI: 10.7567/JJAP.52.060202 

Provided by: Tokyo Institute of Technology

Source:PHYS

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Crystalline Defects in InP-to-Silicon Direct Wafer Bonding

Abstract

InP-to-Si wafer bonding has been proposed as a way of circumventing the problems associated with lattice-mismatch in heteroepitaxial growth. Therefore, in this study the dislocation density and material degradation in InP-to-Si hydrophobic bonding are evaluated. Both interface and InP bulk defects were studied using IR-transmission, atomic force microscopy (AFM) and defect-etching. When the bonded wafers were annealed below 300°C, no volume dislocations were generated in InP. However, when annealing above 300°C, the thermal mismatch stress induced large numbers of volume dislocations in InP. It was also shown that hydrophobic InP-to-Si wafer bonding unfortunately requires high-temperature annealing to achieve sufficient bonding-strength. However, a considerably lower dislocation density was observed in InP-to-Si wafer bonding than that in InP heteroepitaxial growth on Si. Also, when the samples were annealed above 400°C, asymmetric voids emerged at the interface. These voids are associated with the nucleation of indium droplets which causes microcavities at the interface where volume dislocations can sweep-out, forming surface steps. The voids completely disappeared when channel-patterned interfaces were used.

Source: Iopscience
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Semicoherent growth of Bi$_{2}$Te$_{3}$ layers on InP substrates by hot wall epitaxy

Abstract

We search for optimum growth conditions to realize flat BiTe layers on InP(111)B by hot wall epitaxy. The substrate provides a relatively small lattice mismatch, and so (0001)-oriented layers grow semicoherently. The temperature window for the growth is found to be narrow due to the nonzero lattice mismatch and rapid re-evaporation of BiTe. The crystalline qualities evaluated by means of x-ray diffraction reveal deteriorations when the substrate temperature deviates from the optimum not only to low temperatures but also to high temperatures. For high substrate temperatures, the Bi composition increases as Te is partially lost by sublimation. We show, in addition, that the exposure of the BiTe flux at even higher temperatures results in anisotropic etching of the substrates due, presumably, to the Bi substitution by the In atoms from the substrates. By growing BiTe layers on InP(001), we demonstrate that the bond anisotropy on the substrate surface gives rise to a reduction in the in-plane epitaxial alignment symmetry.

Keywords:InP wafer,

Source: Iopscience

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Novel integration method for III–V semiconductor devices on silicon platform

Abstract

A novel integration method for III–V semiconductor devices on a Si platform was demonstrated. Thin-film InP was directly bonded on a Si substrate and metal organic vapor phase epitaxy (MOVPE) growth was performed by using an InP/Si template. A void-free 2-in. InP layer bonded on a Si substrate was realized, and a low interfacial resistance and ohmic contact through the bonded interface were observed. After the MOVPE process, the as-grown structure was optically active and we observed photoluminescence (PL) intensity comparable to that from the same structure grown on InP as a reference. Furthermore, almost no lattice strain was observed from the InP layer. Then, the epitaxial growth of a GaInAsP–InP double-hetero (DH) laser diode (LD) was demonstrated on the substrate and we observed lasing emission at RT in a pulse regime. These results are promising for the integration of InP-based devices on a Si platform for optical interconnection.

Keywords:InP,

Source: Iopscience

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Towards a monolithically integrated III–V laser on silicon: optimization of multi-quantum well growth on InP on Si

Abstract

High-quality InGaAsP/InP multi-quantum wells (MQWs) on the isolated areas of indium phosphide on silicon necessary for realizing a monolithically integrated silicon laser is achieved. Indium phosphide layer on silicon, the pre-requisite for the growth of quantum wells is achieved via nano-epitaxial lateral overgrowth (NELOG) technique from a defective seed indium phosphide layer on silicon. This technique makes use of epitaxial lateral overgrowth (ELOG) from closely spaced (1 µm) e-beam lithography-patterned nano-sized openings (~300 nm) by low-pressure hydride vapor phase epitaxy. A silicon dioxide mask with carefully designed opening patterns and thickness with respect to the opening width is used to block the defects propagating from the indium phosphide seed layer by the so-called necking effect. Growth conditions are optimized to obtain smooth surface morphology even after coalescence of laterally grown indium phosphide from adjacent openings. Surface morphology and optical properties of the NELOG indium phosphide layer are studied using atomic force microscopy, cathodoluminescence and room temperature µ-photoluminescence (µ-PL) measurements. Metal organic vapor phase epitaxial growth of InGaAsP/InP MQWs on the NELOG indium phosphide is conducted. The mask patterns to avoid loading effect that can cause excessive well/barrier thickness and composition change with respect to the targeted values is optimized. Cross-sectional transmission electron microscope studies show that the coalesced NELOG InP on Si is defect-free. PL measurement results indicate the good material quality of the grown MQWs. Microdisk (MD) cavities are fabricated from the MQWs on ELOG layer. PL spectra reveal the existence of resonant modes arising out of these MD cavities. A mode solver using finite difference method indicates the pertinent steps that should be adopted to realize lasing.

Keywords:InP,nano-epitaxial lateral overgrowth (NELOG),epitaxial lateral overgrowth (ELOG),Microdisk (MD),

Source: Iopscience

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Improvement of Crystalline Quality of 3-Inch InP Wafers

The process to decrease the dislocation density in 3-inch Fe-doped InP wafers is described. The crystal growth process is a conventional liquid encapsulated Czochralsky (LEC) but thermal shields have been added in order to decrease the thermal gradient in the growing crystal. The shape of these shields has been optimized with the help of numerical simulations of heat transfer and thermomechanical stresses. This process has been performed step by step with a continuous feedback between calculations and experiments. A 50% reduction of the thermal stress has been obtained. The effects of these improvements on the dislocation densities have been investigated by etch pits density (EPD) and X-ray diffraction (XRD) mapping: the dislocation density has dramatically decreased especially in the upper part of the crystal (from 70,000 to 40,000 cm-2), therefore matching the specifications for microelectronics applications. A same improvement has been obtained for S-doped 3-inch wafers.

Keywords:InP Wafers; liquid encapsulated Czochralsky (LEC) ;etch pits density (EPD) ; X-ray diffraction (XRD);

Source: Iopscience

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