Crystalline Defects in InP-to-Silicon Direct Wafer Bonding

Abstract

InP-to-Si wafer bonding has been proposed as a way of circumventing the problems associated with lattice-mismatch in heteroepitaxial growth. Therefore, in this study the dislocation density and material degradation in InP-to-Si hydrophobic bonding are evaluated. Both interface and InP bulk defects were studied using IR-transmission, atomic force microscopy (AFM) and defect-etching. When the bonded wafers were annealed below 300°C, no volume dislocations were generated in InP. However, when annealing above 300°C, the thermal mismatch stress induced large numbers of volume dislocations in InP. It was also shown that hydrophobic InP-to-Si wafer bonding unfortunately requires high-temperature annealing to achieve sufficient bonding-strength. However, a considerably lower dislocation density was observed in InP-to-Si wafer bonding than that in InP heteroepitaxial growth on Si. Also, when the samples were annealed above 400°C, asymmetric voids emerged at the interface. These voids are associated with the nucleation of indium droplets which causes microcavities at the interface where volume dislocations can sweep-out, forming surface steps. The voids completely disappeared when channel-patterned interfaces were used.

Source: Iopscience
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Semicoherent growth of Bi$_{2}$Te$_{3}$ layers on InP substrates by hot wall epitaxy

Abstract

We search for optimum growth conditions to realize flat BiTe layers on InP(111)B by hot wall epitaxy. The substrate provides a relatively small lattice mismatch, and so (0001)-oriented layers grow semicoherently. The temperature window for the growth is found to be narrow due to the nonzero lattice mismatch and rapid re-evaporation of BiTe. The crystalline qualities evaluated by means of x-ray diffraction reveal deteriorations when the substrate temperature deviates from the optimum not only to low temperatures but also to high temperatures. For high substrate temperatures, the Bi composition increases as Te is partially lost by sublimation. We show, in addition, that the exposure of the BiTe flux at even higher temperatures results in anisotropic etching of the substrates due, presumably, to the Bi substitution by the In atoms from the substrates. By growing BiTe layers on InP(001), we demonstrate that the bond anisotropy on the substrate surface gives rise to a reduction in the in-plane epitaxial alignment symmetry.

Keywords:InP wafer,

Source: Iopscience

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Novel integration method for III–V semiconductor devices on silicon platform

Abstract

A novel integration method for III–V semiconductor devices on a Si platform was demonstrated. Thin-film InP was directly bonded on a Si substrate and metal organic vapor phase epitaxy (MOVPE) growth was performed by using an InP/Si template. A void-free 2-in. InP layer bonded on a Si substrate was realized, and a low interfacial resistance and ohmic contact through the bonded interface were observed. After the MOVPE process, the as-grown structure was optically active and we observed photoluminescence (PL) intensity comparable to that from the same structure grown on InP as a reference. Furthermore, almost no lattice strain was observed from the InP layer. Then, the epitaxial growth of a GaInAsP–InP double-hetero (DH) laser diode (LD) was demonstrated on the substrate and we observed lasing emission at RT in a pulse regime. These results are promising for the integration of InP-based devices on a Si platform for optical interconnection.

Keywords:InP,

Source: Iopscience

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Towards a monolithically integrated III–V laser on silicon: optimization of multi-quantum well growth on InP on Si

Abstract

High-quality InGaAsP/InP multi-quantum wells (MQWs) on the isolated areas of indium phosphide on silicon necessary for realizing a monolithically integrated silicon laser is achieved. Indium phosphide layer on silicon, the pre-requisite for the growth of quantum wells is achieved via nano-epitaxial lateral overgrowth (NELOG) technique from a defective seed indium phosphide layer on silicon. This technique makes use of epitaxial lateral overgrowth (ELOG) from closely spaced (1 µm) e-beam lithography-patterned nano-sized openings (~300 nm) by low-pressure hydride vapor phase epitaxy. A silicon dioxide mask with carefully designed opening patterns and thickness with respect to the opening width is used to block the defects propagating from the indium phosphide seed layer by the so-called necking effect. Growth conditions are optimized to obtain smooth surface morphology even after coalescence of laterally grown indium phosphide from adjacent openings. Surface morphology and optical properties of the NELOG indium phosphide layer are studied using atomic force microscopy, cathodoluminescence and room temperature µ-photoluminescence (µ-PL) measurements. Metal organic vapor phase epitaxial growth of InGaAsP/InP MQWs on the NELOG indium phosphide is conducted. The mask patterns to avoid loading effect that can cause excessive well/barrier thickness and composition change with respect to the targeted values is optimized. Cross-sectional transmission electron microscope studies show that the coalesced NELOG InP on Si is defect-free. PL measurement results indicate the good material quality of the grown MQWs. Microdisk (MD) cavities are fabricated from the MQWs on ELOG layer. PL spectra reveal the existence of resonant modes arising out of these MD cavities. A mode solver using finite difference method indicates the pertinent steps that should be adopted to realize lasing.

Keywords:InP,nano-epitaxial lateral overgrowth (NELOG),epitaxial lateral overgrowth (ELOG),Microdisk (MD),

Source: Iopscience

If you are more interesting in InP wafer, please send email to us: sales@powerwaywafer.com and visit our website: www.powerwaywafer.com